Computer Organization and ArchitectureUploaded by: MYcsvtu Notes
Uploaded by: MYcsvtu Notes
Uploaded by: MYcsvtu Notes
Uploaded by: MYcsvtu Notes
5. Unit-5
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Computer Organization and Architecture SyllabusUNIT-I BASIC COMPUTER ORGANIZATION AND DESIGN Computer Organization, Computer Architecture, Difference between Computer Organization & Computer Architecture, Machine Language, Milestones in Computer Architecture, Organization of a Simple Computer, Interconnection Structures, Bus Interconnection, MAR, MBR, PC, IR, PCI. Data Path of a typical Vo n Neumann Machine, Instruction Code, Decoding & Execution, The Fetch- Decode-Execute Cycle: Example, Instruction Formats, Stack Organization, Addressing Modes, Introduction to pipelining: Linear pipeline processor, Nonlinear pipeline processor, Branch handling techniques, Super pipeline, Data and Resource dependencies, Superscalar Processor. UNIT-II ARITHMETIC PROCESSOR DESIGN Fixed-Point Arithmetic- Addition and Subtraction: addition and subtraction with Signed- Magnitude Data, Hardware Implementation, Hardware Algorithm, addition and subtraction with Signed- 2’s Complement Data. Multiplication Algorithm: Hardware Implementation, Hardware Algorithm, Binary Multiplication, Booth Multiplication Algorithm. Division Algorithm, Floating-Point Arithmetic Operations: Basic Considerations, Register Configuration, Addition, subtraction, Multiplication & Division. Decimal Arithmetic Unit: Decimal Multiplication, Decimal division. UNIT-III CONTROL UNIT ORGANIZATION The Control Unit: Type of control unit, Control Un it Function, Control Unit Operation, Hardwired Control Unit- Basic Concept, Advantages, Disadvantages. Micro- Programmed Control Unit- Basic Concept, Advantages, Disadvantages. Difference between Hardwired Control Unit and Micro-Programmed Control Unit, Control Memory, Address Sequencing. Micro -Programmed Micro-Instruction Types- Vertical Micro- Programming, Horizontal Micro-Programming, Control Store, Horizontal Versus Vertical, Principle Advantages, Disadvantages, Microinstruction Formats, Microinstruction Sequence, Emulation, Bit Slicing. UNIT-IV STORAGE AND MEMORY HIERARCHY Basic Concept and Terminology, Memory Hierarchy, Semiconductor Memories- RAM and ROM Chips, Memory Address Mapping, Memory connected to CPU. Memories and Interleaving- Virtual memory, Cache memories, Cache memory working principles, Cache coherence issues, Cache performance analysis. Memory Management Hardware Requirements. UNIT V INPUT/OUTPUT ORGANIZATION Programmed I/O, I/O Addressing, I/O instruction, Synchronization, I/O Interfacing, Interrupt Mechanism, DMA, I/O Processors and Data Communication. System Interconnect Architectures: Network properties and routing, static interconnection networks, dynamic interconnection networks, multiprocessor system interconnects: Hierarchical bus systems, Crossbar switch and multipart memory, Multistage and combining network. |