Electronics & Telecommunication Engineering(8th Sem.)
VLSI Design__________________________________1. Unit-1
2. Unit-2 28/04/2012
Shared by: RATNESH SINGH
3. Unit-3
4. Unit-4
5. Unit-5
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VLSI Design SyllabusUNIT – I Introduction to Integrated Circuits: Brief introduction of SSI, MSI and LSI; VLSI Design flow; Design hierarchy; concept of regularity, Modularity and Locality; VLSI design styles with FPGA and CPLD: FPGA and CPLD architecture, logic function implementation using LUT. UNIT – II Design Aspects: Basic steps of fabrication process of PMOS, CMOS; Basic Bi-CMOS circuits (Inverter, NOR2, NAND2), Layout design rules: Basics of stick diagram for CMOS; CMOS lambda based layout design rules, Layout of CMOS inverter, NAND Gate, NOR Gate, Full Adder, calculation of resistance and capacitance. UNIT – III Lay Out Design: Lay out design of Memories: 6-T SRAM cell, 1-T DRAM cell; 4x4 NAND and NOR based ROM array; Combinational Logic: 2:4 Decoder, 4:1 MUX, 1 bit Full Adder, Comparator; Sequential Logic: CMOS SR, JK and D latch. UNIT – IV Combinational Logic Design: Static and Dynamic Power dissipation in CMOS Inverter; Introduction to CAD Tools; Introduction to VHDL and Verilog; VHDL: Operators, Data Types, Libraries; Entity, Architecture; Data flow, Structural and Behavioral programming, Generic, Signal, Generate, Process, Loops, Case, Variable, Procedure, Component and Configuration. UNIT – V Sequential Logic Design: Sequential design by VHDL: Flip-Flop and Shift Registers; FSM: Moore and Mealy machine, Counter, Sequence Detector; Bus structure in VHDL, Test bench Modeling in VHDL, Basic concepts of operator overloading, Blocks, Delays, Concepts of Verifications for BIST using Half Adder. |
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